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The PDP-10 KA10 Basic Instruction Diagnostic #3 (MAINDEC-10-DAKAC) test code has been extracted from DAKACM.MAC [original] for use with the PDP-10 Test Machine with Debugger below.
This diagnostic tests “LOGICAL TEST, HALF WORD INSTRUCTIONS AND THE ADDER.”
Resources for this diagnostic include:
[PCjs Machine "testka10"]
Waiting for machine "testka10" to load....
The Debugger’s assemble (“a”) command can be used to test the new built-in MACRO-10 Mini-Assembler, which supports a subset of the MACRO-10 assembly language.
This command:
a 30724 DAKAC.MAC
will automatically read the DAKAC.MAC source file (a slightly modified copy of DAKACM.MAC), assemble it, and then load the binary output at the specified address.
MAINDEC-10-DAKAC.TXT
IDENTIFICATION
--------------
PRODUCT CODE: MAINDEC-10-DAKAC-B-D
PRODUCT NAME: DECSYSTEM10 PDP-10 KA10 BASIC
INSTRUCTION DIAGNOSTIC (3)
FUNCTION: LOGICAL, HALF WORD, ADDER
VERSION: 0.2
DATE RELEASED: JANUARY 1977
MAINTAINED BY: DIAGNOSTIC ENGINEERING GROUP
AUTHOR: JOHN R. KIRCHOFF
COPYRIGHT(C) 1976,1977
DIGITAL EQUIPMENT CORPORATION
MARLBORO, MASS. 01752
THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY
ON A SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH
THE INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE,
OR ANY OTHER COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE
MADE AVAILABLE TO ANY OTHER PERSON EXECPT FOR USE ON SUCH SYSTEM
AND TO ONE WHO AGREES TO THESE LICENSE TERMS. TITLE TO AND
OWNERSHIP OF THE SOFTWARE SHALL AT ALL TIMES REMAIN IN DEC.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION.
DEC ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DEC.
MAINDEC-10-DAKAC.TXT
PAGE 2
TABLE OF CONTENTS
-----------------
1.0 ABSTRACT
2.0 REQUIREMENTS
2.1 EQUIPMENT
2.2 STORAGE
2.3 PRELIMINARY PROGRAMS
3.0 PROGRAM PROCEDURES
3.1 LOADING PROCEDURE
3.2 STARTING PROCEDURE
3.3 OPERATING PROCEDURE
4.0 ERRORS
5.0 ITERATION COUNTER
6.0 CYCLE TIME
7.0 OPERATIONAL VARIATIONS
8.0 MISCELLANEOUS
9.0 LISTING
MAINDEC-10-DAKAC.TXT
PAGE 3
1.0 ABSTRACT
THIS PDP-10 KA10 BASIC INSTRUCTION DIAGNOSTIC IS THE
THIRD IN A SERIES OF PDP-10 KA10 PROCESSOR DIAGNOSTICS.
THE DIAGNOSTIC TESTS SOME FOLLOWING INSTRUCTIONS.
LOGICAL TEST, HALF WORD INSTRUCTIONS AND THE ADDER.
2.0 REQUIREMENTS
2.1 EQUIPMENT
A PDP-10 KA10 WITH A MINIMUM OF 32K OF MEMORY
PAPER-TAPE READER
DECTAPE (OPTIONAL)
CONSOLE TELETYPE
2.2 STORAGE
THE PROGRAM RUNS WITHIN 32K OF MEMORY.
2.3 PRELIMINARY PROGRAMS
CONSOLE FUNCTIONS WORKING PROPERLY
PAPER-TAPE OR DECTAPE READ-IN WORKING PROPERLY
PREVIOUS PROCESSOR DIAGNOSTICS
MAINDEC-10-DAKAC.TXT
PAGE 4
3.0 PROGRAM PROCEDURES
3.1 LOADING PROCEDURE
PAPER TAPE - HARDWARE READ-IN (READER DEVICE CODE 104)
DECTAPE - LOAD WITH DIAMON (DECTAPE DEVICE CODE 320)
3.2 STARTING PROCEDURE
STAND-ALONE STARTING ADDRESS IS 30000.
IF THE DIAGNOSTIC FAILS TO START CORRECTLY TRY STARTING AT THE
FIRST TEST INSTEAD OF AT THE BEGINNING OF THE CONTROL SEQUENCE.
(SEE LISTING).
3.3 OPERATING PROCEDURE
ONCE STARTED THE PROGRAM WILL CYCLE CONTINUALLY UNTIL STOPPED
OR AN ERROR OCCURS.
4.0 ERRORS
ERRORS ARE IN THE FORM OF HALT INSTRUCTIONS. THE LISTING
SHOULD BE CONSULTED TO DETERMINE THE CAUSE OF THE ERROR. A
NO OPERATION (JUMP) INSTRUCTION FOLLOWS EACH HALT. THIS
MAY BE USEFUL IN CONSTRUCTING A SCOPE LOOP TO CYCLE ON THE
FAILING INSTRUCTION.
5.0 ITERATION COUNTER
THE ITERATION COUNT OF THE PROGRAM IS DISPLAYED IN THE MEM-
ORY INDICATORS (MI). THIS COUNT IS A DECREMENTING COUNT AND
INITIALLY STARTS AT -1 IN STAND-ALONE OPERATION.
6.0 CYCLE TIME
THE CYCLE TIME OF THE PROGRAM IS IN THE MILLISECOND RANGE AND
IS THEREFORE SUITABLE FOR TAKING MARGINS, VIBRATION TESTS, ETC.
MAINDEC-10-DAKAC.TXT
PAGE 5
7.0 OPERATIONAL VARIATIONS
A. DIAGNOSTIC MONITOR
THE PROGRAM IS USABLE WITH THE DIAGNOSTIC MONITOR TO PRO-
VIDE RELIABILITY TESTS, ACCEPTANCE TESTS, AND/OR TO PRO-
VIDE A QUICK METHOD OF ISOLATION OF A FAULT TO A PARTICULAR
AREA OF THE PROCESSOR. CERTAIN PROCEDURES ARE USED WHEN
THE PROGRAM IS USED IN THIS MANNER. THEY ARE:
1. THE DIAGNOSTIC MONITOR TRANSFERS CONTROL TO THE PRO-
GRAM AND STARTS IT AT LOCATION 30002.
2. MONCTL - LOCATION 30043 IS USED AS THE DIAGNOSTIC MON-
ITOR CONTROL FLAG WORD.
B. USER MODE
THE PROGRAM WILL OPERATE IN USER MODE AND AS SUCH PROVIDES
ASSURANCE THAT THE PROCESSOR IS PERFORMING ALL FUNCTIONS
CORRECTLY. USER MODE STARTING ADDRESS IS 30000.
C. SYSTEM EXERCISER
STARTING ADDRESS IS 30003. NO DATA SWITCHES ARE USED BY
THIS PROGRAM.
8.0 MISCELLANEOUS
NONE
9.0 LISTING
THIS IS A HISTORY OF THE DEVELOPMENT OF MAINDEC-10-DAKAC
************************************************************************
PRODUCT CODE: MAINDEC-10-DAKAC
PRODUCT NAME: BASIC INSTRUCTION DIAGNOSTIC #3
DATE RELEASED: JANUARY 1977
VERSION: 0.2
UPDATE AUTHOR: JOHN R. KIRCHOFF
CHANGES MADE:
1. UPGRADE TO ALLOW COMPATABILITY WITH THE SUBROUTINE PACKAGE.
************************************************************************
ORIGINAL VERSION: 0.1
ORIGINAL AUTHOR: RICHARD MALISKA
ORIGINAL RELEASE: 16-MAR-72
************************************************************************
[Download]
;MACROS
; STOP - USED FOR SCOPE LOOP, IF INSTRUCTION FAILS, CHANGE (JUMPA .+1)
; TO A (JUMPA X) TO CYCLE ON FAILING INSTRUCTION
DEFINE STOP (A)<
HALT .+1 ;TEST FAILED IF PROGRAM HALTS HERE
JUMPA .+1 ;IF TEST FAILS, CHANGE THIS INSTRUCTION (JUMPA .+1)
;TO JUMPA X(X IS THE ADDRESS OF THE FIRST
;INSTRUCTION IN THE SUBTEST) TO LOOP ON ERROR
;AND CHANGE HALT INSTRUCTION TO JUMPA .+1>
SUBTTL DIAGNOSTIC SECTION
LALL
START: ;SETZM USER#
;JSP 0,.+1 ;GET FLAGS
;TLNE USERF ;IN USER MODE
;SETOM USER ;YES SET USER CONTROLL WORD
;SKIPN MONFLG ;SPECIAL USER MODE
;SETZM USER ;YES CLEAR USER CONTROLL WORD
;SKIPN USER
;JRST STARTA
;SKIPL MONCTL
;TTCALL 3,PGMNAM ;MENTION OUR NAME
JRST STARTA
PGMNAM: ASCIZ/
PDP-10 KA10 BASIC INSTRUCTION DIAGNOSTIC (3) [DAKAC]
/
STARTA: JRST .+1
SUBTTL TEST OF LOGICAL TEST INSTRUCTIONS
;**********
;THIS TEST VERIFIES THAT TDN DOES NOT MODIFY THE AC BECAUSE
;TDN IS A NO-OP
;FIRST, THE AC IS PRELOADED WITH 0. THEN,
;TDN IS EXECUTED. THE AC IS THEN CHECKED FOR
;NO MODIFICATION. IF C(AC) IS UNALTERED, THE TEST PASSES
B12600: SETZ ;PRELOAD AC WITH 0
TDN [-1] ;*TDN IS A NO-OP
CAM ;CAM IS A NO-OP. IT IS HERE IN CASE TDN SKIPS
CAIE ;PASS TEST IF C(AC) IS UNMODIFIED BY TDN
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD FM + EN
;**********
;THIS TEST VERIFIES THAT TSN DOES NOT MODIFY THE AC BECAUSE
;TSN IS A NO-OP
;FIRST, THE AC IS PRELOADED WITH -1. THEN,
;TSN IS EXECUTED. THE AC IS THEN CHECKED FOR
;NO MODIFICATION. IF C(AC) IS UNALTERED, THIS TEST PASSES
B12700: SETO ;PRELOAD AC WITH -1,,-1
TSN [XWD -1,0] ;*TSN IS A NO-OP
CAM ;CAM IS A NO-OP. IT IS HERE IN CASE TSN SKIPS
CAME [-1] ;PASS TEST IF C(AC) IS UNMODIFIED BY TSN
STOP
;**********
;THIS TEST VERIFIES THAT TRN DOE NOT MODIFY THE AC BECAUSE
;TRN IS A NO-OP.
;FIRST, THE AC IS PRELOADED WITH 0. THEN,
;TRN IS EXECUTED. THE AC IS THEN CHECKED FOR
;NO MODIFICATION. IF C(AC) IS UNALTERED, THIS TEST PASSES
B13000: SETZ ;PRELOAD AC WITH 0
TRN 123456 ;*TRN IS A NO-OP
CAM ;CAM IS A NO-OP. IT IS HERE IN CASE TRN SKIPS
CAIE ;PASS TEST IF C(AC) IS UNMODIFIED BY TRN
STOP
;**********
;THIS TEST VERIFIES THAT TLN DOES NOT MODIFY THE AC BECAUSE
;TLN IS A NO-OP.
;FIRST,THE AC IS PRELOADED WITH -1,,-1. THEN,
;TRN IS EXECUTED. THE AC IS THEN CHECKED FOR
;NO MODIFICATION. IF C(AC) IS UNALTERED, THIS TEST PASSES
B13100: SETO ;PRELOAD AC WITH -1,,-1
TLN 123456 ;*TRN IS A NO-OP
CAM ;CAM IS A NO-OP. IT IS HERE IN CASE TRN SKIPS
CAME ;PASS TEST IF C(AC) IS UNMODIFIED BY TRN
STOP
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC) -1,,-1, THE TEST PASSES.
B13200: SETZ ;PRELOAD AC WITH 0
TDO [-1] ;*TDO SHOULD PLACE ALL ONES IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO SKIPS
CAME [-1] ;PASS TEST IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;E SW: FCE
;0 SW: ET1
;0 ET1: BR AR EN
;0 ET1: AD BR - EN
;0 ET1: AD EQV
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THIS AC IS CHECKED FOR ZERO. IF C(AC) IS ZERO, THE TEST PASSES.
B13300: SETZ ;PRELOAD AC WITH 0
TDO ;*TDO SHOULD PLACE ALL ZERO IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO SKIPS
SKIPE ;PASS TEST IF C(AC) ZERO
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 ET1: AD AR + EN
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC,
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR ITS CONTENTS ZERO. IF C(AC) IS ZERO, THE TEST PASSES.
B13400: SETZ ;PRELOAD AC WITH 0
TDO [0] ;*TDO SHOULD PLACE ALL ZERO IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO SKIPS
SKIPE ;PASS TEST IF C(AC) IS ZERO
STOP
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=-1,,-1.
;HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THE TEST PASSES.
B13600: SETO ;PRELOAD AC WITH -1,,-1
TDO ;*TDO SHOULD PLACE ALL ONES IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO SKIPS
CAME [-1] ;PASS TEST IF C(AC) -1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THE TEST PASSES.
B14000: SETO ;PRELOAD AC WITH -1,,-1
TDO [0] ;*TDO SHOULD PLACE ALL ONES IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO SKIPS
CAME [-1] ;PASS TEST IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET1: AD FM - EN
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT TDZ PLACES ZERO IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC) 0, THE TEST PASSES.
B14100: SETZ ;PRELOAD AC WITH 0
TDZ ;*TDZ SHOULD PLACE ALL ZERO IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO
SKIPE ;PASS TEST IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD FM + EN
;**********
;THIS TEST VERIFIES THAT TDZ PLACES ZERO IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1,,-1 AND C(E)=-1,,0.
;HENCE, THE RESULT IN THE AC SHOULD BE 0,,-1.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)= 0,,-1, THE TEST PASSES.
B14200: SETO ;PRELOAD AC WITH -1,,-1
TDZ [XWD -1,0] ;*TDZ SHOULD PLACE 0,,-1 IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO
CAME [0,-1] ;PASS TEST IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-E SW: FCE
;-1,,-1 FC: AD AR -EN
;-1,,0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT TDZ PLACES ZEROS IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THE TEST PASSES.
B14400: SETO ;PRELOAD AC WITH -1,,-1
TDZ ;*TDZ SHOULD PLACE ALL ZERO IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO
SKIPE ;PASS TEST IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT TDZ PLACES ZEROS IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THE TEST PASSES.
B14500: SETZ ;PRELOAD AC WITH 0
TDZ [-1] ;*TDZ SHOULD PLACE ALL ZEROS IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO
SKIPE ;PASS TEST IS C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT TDZ PLACES ZEROS IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=-1,,-1.
;HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED -1,,-1. IF C(AC)=-1,,-1, THE TEST PASSES.
B14600: SETO ;PRELOAD AC WITH -1,,-1
TDZ [0] ;*TDZ SHOULD PLACE ALL ONES IN THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDO
CAME [-1] ;PASS TEST IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT TDC COMPLEMENTS THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=-1 AND C(E)=0,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,0.
;THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES
B14700: SETO ;PRELOAD AC WITH -1,,-1
TDC [XWD 0,-1] ;*TDC SHOULD PLACE -1,,0 INTO THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDC SKIPS
CAME [-1,,0] ;PASS TEST IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-E SW: FCE
;0 FC: AD AR - EN
;0,,-1 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT TDC COMPLEMENTS THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B15000: SETZ ;PRELOAD AC, E WITH 0
TDC ;*TDC SHOULD PLACE 0 INTO THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDC SKIPS
SKIPE ;PASS TEST IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC:AD FM + EN
;**********
;THIS TEST VERIFIES THAT TDC COMPLEMENTS THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, AC=E AND C(AC)= C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST FAILS
B15400: SETO ;PRELOAD AC WITH -1,,-1
TDC ;*TDC SHOULD PLACE 0 INTO THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDC SKIPS
SKIPE ;PASS TEST IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT TDC COMPLEMENTS THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B15500: SETZ ;PRELOAD AC WITH 0
TDC [-1] ;*TDC SHOULD PLACE -1,,-1 INTO THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDC SKIPS
CAME [-1] ;PASS TEST IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 FC: AD EQV
;**********
;THIS TEST VERIFIES THAT TDC COMPLEMENTS THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT AFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE, C(AC)=-1 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B15600: SETO ;PRELOAD AC WITH -1,,-1
TDC [0] ;*TDC SHOULD PLACE -1,,-1 INTO THE AC
CAI ;CAI IS A NO-OP. IT IS HERE IN CASE TDC SKIPS
CAME [-1] ;PASS TEST IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT TDNA ALWAYS SKIPS THE NEXT
;SEQUENTIAL INSTRUCTION. IF TDNA DOES NOT
;SKIP, THIS TEST FAILS.
B15700: SETZ ;PRESET AC, E TO 0
TDNA ;*TDNA SHOULD SKIP THE NEXT INSTRUCTION
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: ET1
;0 FC: AB PC EN
;0 ET1: BR AR EN
;0 ET1: PC CLOCK
;0 ET2: MC INST FETCH EN
;**********
;THIS TEST VERIFIES THAT TDN NEVER SKIPS
;NEXT SEQUENTIAL INSTRUCTION.
;THIS TEST FAILS IF TDN SKIPS.
B16000: SETO ;PRESET AC, E TO -1,,-1
TDN ;*TDN SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDN PASSES
STOP
;**********
;THIS TEST VERIFIES THAT TDN NEVER SKIPS THE
;NEXT SEQUENTIAL INSTRUCTION.
;THIS TEST FAILS IF TDN SKIPS.
B16100: SETZ ;PRESET AC, E TO 0
TDN ;*TDN SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDN PASSES
STOP
;**********
;THIS TEST VERIFIES THAT TDNE SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN ALL OF THE BITS OF THE AC, WHICH ARE MASKED
;BY C(E), ARE ZERO.
;IN THIS TEST C(AC) = -1..0 AND C(E) = 707070..707070.
;HENCE, TDNE SHOULD NOT SKIP THE NEXT SEQUENTIAL INSTRUCTION.
;IF TDNE SKIPS, THIS TEST FAILS
B16200: MOVE [XWD -1,0] ;PRELOAD AC WITH -1..0
TDNE [707070707070] ;*TDNE SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDNE PASSES
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 SW:FCE
;-1,,0 SW: PC CHANGE
;-1,,-1 FC: AD AR + EN
;E ET2: MC INST FETCH EN
;**********
;THIS TEST VERIFIES THAT TDNE SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN ALL OF THE BITS OF THE AC, WHICH ARE MASKED
;BY C(E), ARE ZERO.
;IN THIS CASE, AC=E AND C(AC)=0.
;HENCE, TDNE SHOULD SKIP THE NEXT SEQUENTIAL INSTRUCTION
;IF TDNE DOES NOT SKIP, THIS TEST FAILS.
B16300: SETZ ;PRELOAD AC, E WITH 0
TDNE ;*TDNE SHOULD SKIP THE NEXT INSTRUCTION
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: ET1
;0 ET1: PC CLOCK
;**********
;THIS TEST VERIFIES THAT TDNN SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN NOT ALL OF THE BITS OF THE AC, WHICH ARE MASKED
;BY C(E) ARE ZERO.
;IN THIS TEST AC=E AND C(AC)=C(E)=0. HENCE TDNN
;SHOULD NOT SKIP THE NEXT SEQUENTIAL INSTRUCTION
;IF TDNN SKIPS, THE TEST FAILS.
B16400: SETZ ;PRELOAD AC,E WITH 0
TDNN ;*TDNN SHOULD NOT SKIP THE NEXT INSTRUCTION
SKIPA ;SKIP HALT IF TDNE PASSES
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: PC CHANGE
;0 FC: AB PC EN
;0 ET2: MC INST FETCH EN
;**********
;THIS TEST VERIFIES THAT TDNA ALWAYS SKIPS THE NEXT
;SEQUENTIAL INSTRUCTION. IF TDNA DOES NOT
;SKIP, THIS TEST FAILS.
B16500: SETO ;PRESET AC, E TO 0
TDNA ;*TDNA SHOULD SKIP THE NEXT INSTRUCTION
STOP
;**********
;THIS TEST VERIFIES THAT TDNN SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN NOT ALL OF THE BITS OF THE AC, WHICH ARE MASKED BY C(E),
;ARE ZERO
;IN THIS TEST C(AC)=-1,,0 AND C(E)=707070,,707070. HENCE, TDNN
;SHOULD SKIP THE NEXT INSTRUCTION. IF IT DOES NOT SKIP, THIS TEST FAILS.
B16600: MOVE [XWD -1,0] ;PRESET AC TO -1,,0
TDNN [707070707070] ;*TDNN SHOULD SKIP THE NEXT INSTRUCTION
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 SW: FCE
;-1,,0 SW: ET1
;-1,,0 ET1: PC CLOCK
;**********
;THIS TEST VERIFIES THAT TDNE SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN ALL OF THE BITS OF THE AC, WHICH ARE MASKED
;BY C(E), ARE ZERO.
;IN THIS TEST, C(AC)=-1,,-1 AND C(E)=0. HENCE, TDNE SHOULD SKIP
;THE NEXT SEQUENTIAL INSTRUCTION.
;IF TDNE DOES NOT SKIP, THIS TEST FAILS
B16700: SETO ;PRESET AC TO ALL ONES
TDNE [0] ;*TDNE SHOULD SKIP THE NEXT INSTRUCTION
STOP
;**********
;THIS TEST VERIFIES THAT TDNE SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN ALL OF THE BITS OF THE AC, WHICH ARE MASKED
;BY C(E), ARE ZERO.
;IN THIS TEST C(AC)=0 AND C(E)=-1,,-1, HENCE, TDNE SHOULD SKIP
;THE NEXT SEQUENTIAL INSTRUCTION.
;IF TDNE DOES NOT SKIP, THIS TEST FAILS
B17000: SETZ ;PRESET AC TO 0
TDNE [-1] ;*TDNE SHOULD SKIP THE NEXT INSTRUCTION
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 FC: AD FM + EN
;**********
;THIS TEST VERIFIES THAT TDN NEVER SKIPS THE NEXT SEQUENTIAL INSTRUCTION.
;THIS TEST FAILS IF TDN SKIPS
B17300: SETO ;PRESET AC TO -1,,-1
TDN [0] ;*TDN SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDN PASSES
STOP
;**********
;THIS TEST VERIFIES THAT TDN NEVER SKIPS THE NEXT SEQUENTIAL INSTRUCTION.
;THIS TEST FAILS IF TDN SKIPS
B17400: SETZ ;PRESET AC TO 0
TDN [-1] ;*TDN SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDN PASSES
STOP
;**********
;THIS TEST VERIFIES THAT TDNA ALWAYS SKIPS THE NEXT SEQUENTIAL INSTRUCTION
;THIS TEST FAILS IF TDNA DOES NOT SKIP
B17700: SETO ;PRESET AC TO -1,,-1
TDNA [0] ;*TDNA SHOULD SKIP
STOP
;**********
;THIS TEST VERIFIES THAT TDNA ALWAYS SKIPS THE NEXT SEQUENTIAL INSTRUCTION
;THIS TEST FAILS IF TDNA DOES NOT SKIP
B20000: SETZ ;PRESET AC TO 0
TDNA [-1] ;*TDNA SHOULD SKIP
STOP
;**********
;THIS TEST VERIFIES THAT TDNE SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN ALL OF THE BITS OF THE AC, WHICH ARE MASKED BY C(E), ARE ZERO.
;IN THIS TEST AC=E AND C(AC)=C(E)=-1,,-1. HENCE TDNE SHOULD NOT SKIP.
;IF TDNE SKIPS, THIS TEST FAILS.
B20400: SETO ;PRESET AC,E TO -1,,-1
TDNE ;*TDNE SHOULD NOT SKIP
SKIPA ;SKIP HALT IF TDNE PASSES
STOP
;**********
;THIS TEST VERIFIES THAT TDNN SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN NOT ALL OF THE BITS OF THE AC, WHICH ARE MASKED BY C(E), ARE ZERO.
;IN THIS TEST, AC=E AND C(AC)=C(E)=-1,,-1. HENCE TDNN SHOULD SKIP
;IF TDNN DOES NOT SKIP, THIS TEST FAILS
B20600: SETO ;PRESET AC,E TO -1,,-1
TDNN ;*TDNN SHOULD SKIP THE NEXT SEQUENTIAL INSTRUCTION
STOP
;**********
;THIS TEST VERIFIES THAT TDNN SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN NOT ALL OF THE BITS OF THE AC, WHICH ARE MASKED BY C(E), ARE ZERO.
;IN THIS TEST, C(AC)=0 AND C(E)=-1,,-1. HENCE TDNN SHOULD NOT SKIP
;IF TDNN SKIPS, THIS TEST FAILS
B20700: SETZ ;PRESET AC TO 0
TDNN [-1] ;*TDNN SHOULD NOT SKIP THE NEXT SEQUENTIAL INSTRUCTION
SKIPA ;SKIP HALT IF TDNN PASSES
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 FC: AD FM + EN
;**********
;THIS TEST VERIFIES THAT TDNN SKIPS THE NEXT SEQUENTIAL INSTRUCTION WHEN
;AND ONLY WHEN NOT ALL OF THE BITS OF THE AC, WHICH ARE MASKED BY C(E), ARE ZERO.
;IN THIS TEST, C(AC)=-1,,-1 AND C(E)=0. HENCE TDNN SHOULD NOT SKIP
;IF TDNN SKIPS, THIS TEST FAILS
B21000: SETO ;PRESET AC TO -1,,-1
TDNN [0] ;*TDNN SHOULD NOT SKIP THE NEXT SEQUENTIAL INSTRUCTION
SKIPA ;SKIP HALT IF TDNN PASSES
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD AR + EN
;**********
;THIS TEST VERIFIES THAT TDO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY C(E) AND DOES NOT EFFECT THE UNMASKED BITS OF THE AC.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC SHOULD BE -1,,0
;THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES
B21100: SETZ ;PRELOAD AC WITH 0
TDO [XWD -1,0] ;*TDO SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE,
;THE RESULT IN THE AC SHOULD BE 0,,-1. THE AC IS
;CHECKED FOR 0,,-1. THIS TEST PASSES IF C(AC)=0,,-1
B21400: SETZ ;PRESET AC WITH 0
TSO [XWD -1,0] ;*TSO SHOULD PLACE 0,,-1 INTO THE AC
CAME [XWD 0,-1] ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;0 SW: ET0
;0 SW: ET1
;0 FC: AD FM + EN
;0 FC: AD AR + EN
;0 ET0: AR SWAP
;0 ET0: AD FM + EN
;0 ET0: AD AR + EN
;0 ET1: BR AR EN
;0 ET1: AD BR - EN
;-1,,-1 ET1: AD AR + EN
;0 ET1: AD EQV
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=0 AND C(E)=0,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,0. THE AC IS
;CHECKED FOR -1,,0. THIS TEST PASSES IF C(AC)=-1,,0
B21500: SETZ ;PRESET AC WITH 0
TSO [XWD 0,-1] ;*TSO SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=0 AND C(E)=0,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,0. THE AC IS
;CHECKED FOR ITS CONTENTS NON-ZERO. THIS TEST PASSES IF C(AC) IS NON-ZERO
B21600: SETZ ;PRELOAD AC,E WITH 0
TSO ;*TSO SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, AC=E AND C(AC)=C(E)=-1,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,-1. THE AC IS
;CHECKED FOR -1,,-1. THIS TEST PASSES IF C(AC) -1,,-1
B21700: SETO ;PRELOAD AC,E WITH -1,,-1
TSO ;*TSO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,0. THE AC IS
;CHECKED FOR -1,,0. THIS TEST PASSES IF C(AC)=-1,,0
B22200: MOVE [XWD -1,0] ;PRELOAD AC WITH -1,,0
TSO [XWD 0,-1] ;*TSO SHOULD PLACE -1,,0 INTO THE AC
CAME [-1,,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=0. HENCE,
;THE RESULT IN THE AC SHOULD BE 0,,-1. THE AC IS
;CHECKED FOR 0,,-1. THIS TEST PASSES IF C(AC)=0,,-1
B22300: MOVEI -1 ;PRELOAD AC WITH 0,,-1
TSO [0] ;*TSO SHOULD PLACE 0,,-1 INTO THE AC
CAME [XWD 0,-1] ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET1: AD FM - EN
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MASKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,0. THE AC IS
;CHECKED FOR -1,,0. THIS TEST PASSES IF C(AC)=-1,,0
B22400: MOVE [XWD -1,0] ;PRELOAD AC WITH -1,,0
TSO [0] ;*TSO SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MARKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=-1,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,-1. THE AC IS
;CHECKED FOR -1,,-1. THIS TEST PASSES IF C(AC)=-1,,-1
B22500: MOVEI -1 ;PRELOAD AC WITH 0,,-1
TSO [-1] ;*TSO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT TSO PLACES ONES IN THE BITS OF THE AC
;WHICH ARE MARKED BY BOTH HALVES OF C(E) SWAPPED.
;THE UNMASKED BITS OF THE AC ARE NOT AFFECTED
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=-1,,-1. HENCE,
;THE RESULT IN THE AC SHOULD BE -1,,-1. THE AC IS
;CHECKED FOR -1,,-1. THIS TEST PASSES IF C(AC)=-1,,-1
B22600: MOVE [XWD -1,0] ;PRELOAD AC WITH -1,,0
TSO [-1] ;*TSO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
SUBTTL TEST OF HWT INSTRUCTIONS
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B22700: SETZ ;PRELOAD AC,E WITH 0
HLL ;*HLL SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC: AD AR + EN
;0,,-1 FC: AD RT FM + EN
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1,
;THIS TEST PASSES.
B23000: SETO ;PRELOAD AC WITH -1,,-1
HLL [0] ;*HLL SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 SW: FCE
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE AC=E AND C(AC)=C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B23200: SETO ;PRELOAD AC,E WITH -1,,-1
HLL ;*HLL SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0,
;THIS TEST PASSES
B23400: SETZ ;PRELOAD AC WITH 0
HLL [-1] ;*HLL SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0,
;THIS TEST PASSES.
B23600: SETZ ;PRELOAD AC WITH 0
HLL [XWD -1,0] ;*HLL SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLL PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1,
;THIS TEST PASSES.
B23700: SETO ;PRELOAD AC WITH -1,,-1
HLL [XWD 0,-1] ;*HLL SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B24000: SETZ ;PRELOAD AC,E WITH 0
HLLZ ;*HLLZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC: AD LT AR + EN
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B24300: SETO ;PRELOAD AC WITH -1,,-1
HLLZ [-1] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;-1,,-1 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR ITS CONTENTS NON-ZERO
;IF C(AC) IS NON-ZERO, THIS TEST PASSES.
B24400: SETZ ;PRELOAD AC WITH -1,,-1
HLLZ [-1] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR ZERO
;IF C(AC) IS ZERO, THIS TEST PASSES.
B24500: SETO ;PRELOAD AC WITH -1,,-1
HLLZ [0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
SKIPE ;PASS IF C(AC) IS ZERO.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR ZERO
;IF C(AC) IS ZERO, THIS TEST PASSES.
B24600: SETZ ;PRELOAD AC WITH 0
HLLZ [0] ;*HLLZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC) IS ZERO.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZI ALWAYS CLEARS THE AC.
;IN THIS CASE C(AC)=-1,,-1 AND E=0,,-1.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B24700: SETO ;PRELOAD AC WITH -1,,-1
HLLZI -1 ;*HLLZI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC: AD LT AR + EN
;0,,-1 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLLZI ALWAYS CLEARS THE AC.
;IN THIS CASE C(AC)=0 AND E=0,,-1.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B25000: SETZ ;PRELOAD AC WITH 0
HLLZI -1 ;*HLLZI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B25100: SETO ;PRELOAD AC WITH -1,,-1
HLLZ [XWD -1,0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0 THIS TEST PASSES.
B25200: SETZ ;PRELOAD AC WITH 0
HLLZ [XWD -1,0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B25300: MOVEI -1 ;PRELOAD AC WITH -1,,-1
HLLZ [-1] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0 THIS TEST PASSES.
B25400: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLLZ [-1] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR ZERO.
;IF C(AC) IS ZERO, THIS TEST PASSES.
B25500: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HLLZ [0] ;*HLLZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC) IS ZERO.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR ZERO.
;IF C(AC) IS ZERO, THIS TEST PASSES.
B25600: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLLZ [0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
SKIPE ;PASS IF C(AC) IS ZERO.
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B25700: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HLLZ [XWD -1,0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZI ALWAYS CLEARS THE AC.
;IN THIS CASE C(AC)=0,,-1 AND E=0,,-1.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B26000: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HLLZI -1 ;*HLLZI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZ PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B26100: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLLZ [XWD -1,0] ;*HLLZ SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLZI ALWAYS CLEARS THE AC.
;IN THIS CASE C(AC)=-1,,0 AND E=0,,-1.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B26200: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLLZI -1 ;*HLLZI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B26300: SETZ ;PRELOAD AC WITH 0
HRR ;*HRR SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 FC: AD RT AR + EN
;-1,,0 FC: AD LT FM + EN
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE AC=E AND C(AC)=C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B26500: SETO ;PRELOAD AC WITH -1,,-1
HRR ;*HRR SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 SW: FCE
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B26600: SETO ;PRELOAD AC WITH -1,,-1
HRR [XWD -1,0] ;*HRR SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HRRI PLACES E INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE C(AC)=-1,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B26700: SETO ;PRELOAD AC WITH -1,,-1
HRRI -1 ;*HRRI SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B27000: SETO ;PRELOAD AC WITH -1,,-1
HRR [0] ;*HRR SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B27100: SETZ ;PRELOAD AC WITH 0
HRR [0] ;*HRR SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B27200: SETZ ;PRELOAD AC WITH 0
HRR [-1] ;*HRR SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRI PLACES E INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE C(AC)=0 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B27300: SETZ ;PRELOAD AC WITH 0
HRRI -1 ;*HRRI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD LT FM + EN
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B27400: SETZ ;PRELOAD AC WITH 0
HRR [XWD -1,0] ;*HRR SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=0,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B27500: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRR [XWD -1,0] ;*HRR SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRRI PLACES E INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE C(AC)=-1,,0 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B27600: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRRI -1 ;*HRRI SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRI PLACES E INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE C(AC)=0,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B27700: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRRI -1 ;*HRRI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRR PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=-1,,0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B30000: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRR [XWD -1,0] ;*HRR SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B30100: SETZ ;PRELOAD AC,E WITH 0
HRRZ ;*HRRZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 FC: AD RT AR + EN
;**********
;THIS TEST VERIFIES THAT HRRZI PLACES E INTO
;THE RIGHT HALF OF THE AC AND CLEARS THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES
B30400: SETO ;PRELOAD AC WITH -1,,-1
HRRZI -1 ;*HRRZI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZI PLACES E INTO
;THE RIGHT HALF OF THE AC AND CLEARS THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B30500: SETO ;PRELOAD AC WITH -1,,-1
HRRZI 0 ;*HRRZI SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 FC: AD RT AR + EN
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B30600: SETO ;PRELOAD AC WITH -1,,-1
HRRZ [XWD -1,0] ;*HRRZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;E SW: FCE
;-1,,0 ET2: AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B30700: SETO ;PRELOAD AC WITH -1,,-1
HRRZ [-1] ;*HRRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=0,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B31000: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRRZ [-1] ;*HRRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=0,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B31100: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRRZ [0] ;*HRRZ SHOULD PLACE 0 INTO THE AC
CAIE 0 ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B31200: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRRZ [-1] ;*HRRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B31300: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRRZ [0] ;*HRRZ SHOULD PLACE 0 INTO THE AC
CAIE 0 ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=0,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B31400: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRRZ [XWD -1,0] ;*HRRZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,0 AND C(E)=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B31500: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRRZ [XWD 0,-1] ;*HRRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZI PLACES E INTO
;THE RIGHT HALF OF THE AC AND CLEARS THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=0,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES
B31600: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRRZI -1 ;*HRRZI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,1
STOP
;**********
;THIS TEST VERIFIES THAT HRRZ PLACES THE RIGHT HALF OF C(E) INTO
;RIGHT HALF OF THE AC AND PLACES ZEROS INTO THE LEFT HALF OF THE AC
;IN THIS CASE C(AC)=-1,,0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B31700: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRRZ [XWD -1,0] ;*HRRZ SHOULD PLACE 0 INTO THE AC,0]
CAIE 0 ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B32000: SETZ ;PRELOAD AC WITH 0
HRL ;*HRL SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B32100: SETO ;PRELOAD AC WITH -1,,-1
HRL [-1] ;*HRL SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;E,,-1 SW: FCE
;0,,-1 FC: AD RT FM + EN
;0,,-1 ET2: AR LT AR RT EN
;-1,,0 ET2: AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B32200: SETO ;PRELOAD AC WITH -1,,-1
HRL [0] ;*HRL SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B32300: SETO ;PRELOAD AC WITH -1,,-1
HLR [0] ;*HLR SHOULD PLACE -1,,0 INTO THE AC
CAME [-1,,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B32600: SETZ ;PRELOAD AC WITH 0
HRL [-1] ;*HRL SHOULD PLACE -1,,0 INTO THE AC
CAME [-1,,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B32700: SETZ ;PRELOAD AC WITH 0
HLR [-1] ;*HLR SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;-1,,-1 FC: AD LT FM + EN
;0 ET2: AR RT AR LT EN
;**********
;THIS TEST VERIFIES THAT HRLI PLACES E INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=-1,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B33000: SETZ ;PRELOAD AC WITH -1,,-1
HRLI -1 ;*HRLI SHOULD PLACE -1,,-1 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD RT FM + EN
;0 ET2: AR LT AR RT EN
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B33100: SETZ ;PRELOAD AC WITH -1,,-1
HLR [XWD -1,0] ;*HLR SHOULD PLACE -1,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B33200: SETZ ;PRELOAD AC WITH 0
HRL [XWD -1,0] ;*HRL SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLRI ALWAYS CLEARS THE RIGHT HALF
;OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=0 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0
;IF C(AC)=0, THIS TEST PASSES.
B33300: SETZ ;PRELOAD AC WITH 0
HLRI -1 ;*HLRI SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC:AD LT FM + EN
;**********
;THIS TEST VERIFIES THAT HRLI PLACES E INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE C(AC)=-1,,-1 AND E=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B33400: SETO ;PRELOAD AC WITH -1,,-1
HRLI -1 ;*HRLI SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 ET2: AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B33500: SETO ;PRELOAD AC WITH -1,,-1
HLR [XWD -1,0] ;*HLR SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B33600: SETO ;PRELOAD AC WITH -1,,-1
HRL [XWD -1,0] ;*HRL SHOULD PLACE 0,,-1 INTO THE AC
CAME [XWD 0,-1] ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLRI ALWAYS CLEARS THE RIGHT HALF
;OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0
;IF C(AC)=-1,,0, THIS TEST PASSES.
B33700: SETO ;PRELOAD AC WITH -1,,-1
HLRI -1 ;*HLRI SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B34000: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRL [0] ;*HRL SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLRI ALWAYS CLEARS THE RIGHT HALF
;OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=0,,-1 AND E=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0
;IF C(AC)=0, THIS TEST PASSES.
B34100: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HLRI ;*HLRI SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B34200: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRL [-1] ;*HRL SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B34300: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HLR [-1] ;*HLR SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B34400: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRL [0] ;*HRL SHOULD PLACE 0 INTO THE AC
CAIE 0 ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B34500: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLR [0] ;*HLR SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HRL PLACES THE RIGHT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC. THE RIGHT HALF OF THE AC IS UNAFFECTED
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B34600: MOVSI -1 ;PRELOAD AC WITH -1,,0
HRL [-1] ;*HRL SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLR PLACES THE LEFT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC. THE LEFT HALF OF THE AC IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=-1,,-1 HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B34700: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLR [-1] ;*HLR SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLM PLACES THE LEFT HALF OF C(AC) INTO
;THE LEFT HALF OF E. THE RIGHT HALF OF E IS UNAFFECTED.
;IN THIS CASE, AC=E AND C(AC)= C(E)=0. HENCE, THE RESULT IN E
;SHOULD BE 0. E IS CHECKED FOR 0. IF C(E)=0, THIS TEXT PASSES.
B35000: SETZ ;PRELOAD AC,E WITH 0
HLLM ;*HLLM SHOULD PLACE 0 INTO E
SKIPE ;PASS IF C(E)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 0 FC: AD FM + EN
;0,,-1 0,,-1 ET0: AD RT BR + EN
;B35000 0,,-1 ET0: BR AR EN
;-1,,0 0,,-1 ET0: AD LT AR + EN
;**********
;THIS TEST VERIFIES THAT HLLM PLACES THE LEFT HALF OF C(AC) INTO
;THE LEFT HALF OF E. THE RIGHT HALF OF E IS UNAFFECTED.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN E
;SHOULD BE 0,,-1. E IS CHECKED FOR 0,,-1. IF C(E)=0,,-1, THIS TEST PASSES.
B35500: SETZ ;PRELOAD AC WITH 0
SETO 1, ;PRELOAD E WITH -1,,-1
HLLM 1 ;*HLLM SHOULD PLACE 0,,-1 INTO E
CAIE 1,- 1 ;PASS IF C(E) =0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 -1,,-1 SW: FCE PSE
;0 0 SW: ET0
;0 -1,,-1 ET0: AR AD EN
;0 0 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLLM PLACES THE LEFT HALF OF C(AC) INTO
;THE LEFT HALF OF E. THE RIGHT HALF OF E IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN E
;SHOULD BE -1,,0. E IS CHECKED FOR -1,,0. IF C(E)=-1,,0, THIS TEST PASSES
B35600: SETO ;PRELOAD AC WITH -1,,-1
SETZ 1, ;PRELOAD E WITH 0
HLLM 1 ;*HLLM SHOULD PLACE -1,,0 INTO E
CAME 1,[XWD -1,0] ;PASS IF C(E) = -1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HRRM PLACES THE RIGHT HALF OF C(AC) INTO
;THE RIGHT HALF OF E. THE LEFT HALF OF E IS UNAFFECTED.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN E
;SHOULD BE -1,,0. E IS CHECKED FOR -1,,0
;IF C(E) = -1,,0, THIS TEST PASSES.
B35700: SETZ ;PRELOAD AC WITH 0
SETO 1, ;PRELOAD E WITH -1,,-1
HRRM 1 ;*HRRM SHOULD PLACE -1,,0 INTO E
CAME 1,[XWD -1,0] ;PASS IF C(E) = -1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 -1,,-1 SW: FCE PSE
;0 0 SW: ET0
;0 -1,,-1 FC: AD FM + EN
;-1,,-1 -1,,-1 ET0: AD LT BR + EN
;0 -1,,-1 ET0: AD RT AR + EN
;0 0 ET0: BR AR EN
;0 -1,,-1 ET0: AR AD EN
;0 0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HRRM PLACES THE RIGHT HALF OF C(AC) INTO
;THE RIGHT HALF OF E. THE LEFT HALF OF E IS UNAFFECTED.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=0. HENCE, THE RESULT IN E
;SHOULD BE 0,,-1. E IS CHECKED FOR = 0,,-1
;IF C(E) = 0,,-1, THIS TEST PASSES.
B36000: SETO ;PRELOAD AC WITH -1,,-1
SETZ 1, ;PRELOAD E WITH 0
HRRM 1 ;*HRRM SHOULD PLACE 0,,-1 INTO E
CAIE 1,-1 ;PASS IF C(E) = 0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=-1,,-1. HENCE THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B36100: SETO ;PRELOAD AC WITH -1,,-1
HLLO ;*HLLO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS OF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,-1 SW: FCE
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0,,-1. HENCE THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B36200: SETZ ;PRELOAD AC WITH 0
HLLO [XWD 0,-1] ;*HLLO SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD LT AR + EN
;**********
;THIS TEST VERIFIES THAT HRRO PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=-1,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B36300: SETO ;PRELOAD AC,E WITH -1,,-1
HRRO ;*HRRO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 SW: FCE
;**********
;THIS TEST VERIFIES THAT HRRO PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B36400: SETZ ;PRELOAD AC WITH 0
HRRO [XWD -1,0] ;*HRRO SHOULD PLACE -1,,0 INTO THE AC
CAME [-1,,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD RT AR + EN
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B36500: SETZ ;PRELOAD AC WITH 0
HLLO [0] ;*HLLO SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HRRO PLACES THE RIGHT HALF OF C(E) INTO
;THE RIGHT HALF OF THE AC AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES.
B36600: SETZ ;PRELOAD AC WITH 0
HRRO [0] ;*HRRO SHOULD PLACE -1,,0 INTO THE AC
CAME [-1,,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HLLOI ALWAYS PLACES 0,,-1 INTO THE AC.
;IN THIS CASE, C(AC)=0 AND E=0.
;THE RESULT IN THE AC SHOULD BE 0,,-1.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES
B37100: SETZ ;PRELOAD AC WITH 0
HLLOI ;*HLLOI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD LT AR + EN
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HRROI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND E=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1, THIS TEST PASSES
B37200: SETZ ;PRELOAD AC WITH 0
HRROI ;*HRROI SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,-1 FC: AD RT AR + EN
;0 ET2: AR AD EN
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B37300: SETZ ;PRELOAD AC WITH 0
HLLO [XWD -1,0] ;*HLLO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRROI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B37400: SETZ ;PRELOAD AC WITH 0
HRROI -1 ;*HRRIO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLOI ALWAYS PLACES 0,,-1 INTO THE AC.
;IN THIS CASE, C(AC)=0 AND E=0.
;THE RESULT IN THE AC SHOULD BE 0,,-1.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES
B37500: SETO ;PRELOAD AC WITH -1,,-1
HLLOI ;*HLLOI SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRROI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND E=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES
B37600: SETO ;PRELOAD AC WITH -1,,-1
HRROI ;*HRRIO SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B37700: SETO ;PRELOAD AC WITH -1,,-1
HLLO [XWD -1,0] ;*HLLO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRROI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND E=0,,-1. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,-1. THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B40000: SETO ;PRELOAD AC WITH -1,,-1
HRROI -1 ;*HRRIO SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRROI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES ONES INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0,,-1 AND E=0. HENCE, THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0. IF C(AC)=-1,,0, THIS TEST PASSES
B40100: MOVEI -1 ;PRELOAD AC WITH 0,,-1
HRROI ;*HRRIO SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0
STOP
;**********
;THIS TEST VERIFIES THAT HLLO PLACES THE LEFT HALF OF C(E) INTO
;THE LEFT HALF OF THE AC AND PLACES ONES INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,0 AND C(E)=0,,-1. HENCE THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B40200: MOVSI -1 ;PRELOAD AC WITH -1,,0
HLLO [XWD 0,-1] ;*HLLO SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRLZ PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC.
;AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE FINAL RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B40300: SETZ ;PRELOAD AC WITH 0
HRLZ ;*HRLZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLRZ PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES ZEROS INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0. THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B40400: SETZ ;PRELOAD AC WITH 0
HLRZ ;*HLRZ SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRLZI PLACES E INTO THE LEFT HALF OF THE AC
;AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND E=0,,-1. HENCE THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0
;IF C(AC)=-1,,0, THIS TEST PASSES.
B40700: SETZ ;PRELOAD AC WITH 0
HRLZI -1 ;*HRLZI SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0.
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 ET2: AR LT AR RT EN
;**********
;THIS TEST VERIFIES THAT HLRZ PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES ZEROS INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B41000: SETZ ;PRELOAD AC WITH 0
HLRZ [XWD -1,0] ;*HLRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;-1,,0 ET2: AR RT AR LT EN
;**********
;THIS TEST VERIFIES THAT HRLZI PLACES E INTO THE LEFT HALF OF THE AC
;AND PLACES ZEROS INTO THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND E=0,,-1. HENCE THE RESULT IN THE AC
;SHOULD BE -1,,0. THE AC IS CHECKED FOR -1,,0.
;IF C(AC)=-1,,0, THIS TEST PASSES.
B41100: SETO ;PRELOAD AC WITH -1,,-1
HRLZI -1 ;*HRLZI SHOULD PLACE -1,,0 INTO THE AC
CAME [XWD -1,0] ;PASS IF C(AC)=-1,,0.
STOP
;**********
;THIS TEST VERIFIES THAT HLRZ PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES ZEROS INTO THE LEFT HALF OF THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC
;SHOULD BE 0,,-1. THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST PASSES.
B41200: SETO ;PRELOAD AC WITH -1,,-1
HLRZ [XWD -1,0] ;*HLRZ SHOULD PLACE 0,,-1 INTO THE AC
CAIE -1 ;PASS IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLE PLACES THE LEFT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B41500: SETZ ;PRELOAD AC WITH 0
HLLE ;*HLLE SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC: AD LT AR + EN
;**********
;THIS TEST VERIFIES THAT HLLE PLACES THE LEFT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B41600: SETZ ;PRELOAD AC WITH 0
HLLE [-1] ;*HLLE SHOULD PLACE -1,,-1 INTO THE AC
CAME [XWD -1,-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;-1,,-1 ET2: AR LT AD EN
;-1,,0 ET2: AR0(1): AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HRRE PLACES THE RIGHT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC.
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B42000: SETZ ;PRELOAD AC WITH 0
HRRE [-1] ;*HRRE SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1,,-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLLE PLACES THE LEFT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B42200: SETZ ;PRELOAD AC WITH 0
HLLE [XWD -1,0] ;*HLLE SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRRE PLACES THE RIGHT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC.
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC.
;IN THIS CASE, AC=E AND C(AC)=C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B42300: SETZ ;PRELOAD AC,E WITH 0
HRRE ;*HRRE SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;E SW: FCE
;-1,,0 ET2: AR RT AD EN
;0,,-1 ET2: AR18(1): AR LT AD EN
;0,,-1 FC: AR RT AR + EN
;**********
;THIS TEST VERIFIES THAT HRRE PLACES THE RIGHT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC.
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC.
;IN THIS CASE C(AC)=0 AND C(E)=-1,,0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES.
B42500: SETZ ;PRELOAD AC WITH 0
HRRE [XWD -1,0] ;*HRRE SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HRREI PLACES E INTO THE RIGHT HALF OF THE AC
;AND PLACES THE LEFTMOST BIT OF E INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(AC)=0 AND E=0,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES.
B42700: SETZ ;PRELOAD AC WITH 0
HRREI -1 ;*HRREI SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 ET2: AR RT AD EN
;0,,-1 ET2: AR18(1): AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLLEI ALWAYS CLEARS THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND E=0,,-1.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0.
;IF C(AC)=0, THIS TEST PASSES.
B43000: SETO ;PRELOAD AC WITH -1,,-1
HLLEI -1 ;*HLLEI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 FC: AD LT AR + EN
;0,,-1 ET2: AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLLEI ALWAYS CLEARS THE AC.
;IN THIS CASE, C(AC)=-1,,-1 AND E=0,,400000.
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0.
;IF C(AC) = ZERO, THIS TEST PASSES.
B43100: SETO ;PRELOAD AC WITH -1,,-1
HLLEI 400000 ;*HLLEI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0.
STOP
;**********
;THIS TEST VERIFIES THAT HRLE PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST FAILS
B43400: SETZ ;PRELOAD AC WITH 0
HRLE ;*HRLE SHOULD PLACE 0 INTO THE AC
SKIPE ;FAIL IF C(AC)=0,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HRLEI PLACES E INTO THE LEFT HALF OF THE AC
;AND PLACES THE LEFTMOST BIT OF E INTO ALL BITS OF THE RIGHT HALF OF THE AC
;IN THIS CASE, C(AC)=0 AND E=0,,-1. HENCE, THE RESULT IN THE AC SHOULD -1,,-1
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=1,,-1, THIS TEST PASSES.
B43500: SETZ ;PRELOAD AC WITH 0
HRLEI -1 ;*HRLEI SHOULD PLACE -1,,-1 INTO THE AC
CAME [XWD -1,-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 ET2: AR LT AR RT EN
;-1,,0 ET2: AR 18(1): AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HRLE PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST FAILS
B43600: HRLE [0] ;*HRLE SHOULD PLACE 0 INTO THE AC
SKIPE ;FAIL IF C(AC)=0,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;E,,0 SW: FCE
;**********
;THIS TEST VERIFIES THAT HRLE PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST FAILS
B43700: HRLE [-1] ;PRELOAD AC WITH 0
CAME [-1] ;*HRLE SHOULD PLACE 0 INTO THE AC
STOP ;FAIL IF C(AC)=0,,-1
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;-1,,0 ET2: AR LT AR RT EN
;-1,,0 ET2: AR18(1): AR RT AD EN
;**********
;THIS TEST VERIFIES THAT HRLE PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST FAILS
B44000: HRLE [XWD -1,0] ;PRELOAD AC WITH 0
SKIPE ;*HRLE SHOULD PLACE 0 INTO THE AC
STOP ;FAIL IF C(AC)=0,,-1
;**********
;THIS TEST VERIFIES THAT HRLE PLACES THE RIGHT HALF OF C(E)
;INTO THE LEFT HALF OF THE AC
;AND PLACES BIT 18 OF C(E) INTO ALL BITS OF THE RIGHT HALF OF THE AC.
;IN THIS CASE, C(AC)=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0,,-1. IF C(AC)=0,,-1, THIS TEST FAILS
B44100: HRLE [XWD 0,-1] ;PRELOAD AC WITH 0
CAME [-1] ;*HRLE SHOULD PLACE 0 INTO THE AC
STOP ;FAIL IF C(AC)=0,,-1
;**********
;THIS TEST VERIFIES THAT HLRE PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(AC=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B44200: SETZ ;PRELOAD AC WITH 0
HLRE ;*HLRE SHOULD PLACE 0 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLRE PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(AC=0 AND C(E)=0. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B44300: SETZ ;PRELOAD AC WITH 0
HLRE [-1] ;*HLRE SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 SW: FCE
;-1,,0 ET2: AR RT AR LT EN
;0,,-1 ET2: AR0(1): AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HLREI CLEARS THE AC
;IN THIS CASE C(AC)=-1,,-1 AND E=0,,-1
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THEN TEST PASSES
B44500: SETO ;PRELOAD AC WITH -1,,-1
HLREI -1 ;*HLREI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0,,1 ET2: AR RT AR LT EN
;**********
;THIS TEST VERIFIES THAT HLREI CLEARS THE AC
;IN THIS CASE C(AC)=0 AND E=0
;THE RESULT IN THE AC SHOULD BE 0
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THE TEST PASSES
B44600: HLREI ;*HLREI SHOULD CLEAR THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLRE PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(E)=-1,,0. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B44700: HLRE [XWD -1,0] ;*HLRE SHOULD PLACE -1,,0 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLRE PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(E)=0,,-1. HENCE, THE RESULT IN THE AC SHOULD BE 0.
;THE AC IS CHECKED FOR 0. IF C(AC)=0, THIS TEST PASSES
B45000: HLRE [XWD 0,-1] ;*HLRE SHOULD PLACE 0,,-1 INTO THE AC
SKIPE ;PASS IF C(AC)=0
STOP
;**********
;THIS TEST VERIFIES THAT HLRE PLACES THE LEFT HALF OF C(E)
;INTO THE RIGHT HALF OF THE AC
;AND PLACES BIT 0 OF C(E) INTO ALL BITS OF THE LEFT HALF OF THE AC
;IN THIS CASE, C(E)=-1,,-1. HENCE, THE RESULT IN THE AC SHOULD BE -1,,-1.
;THE AC IS CHECKED FOR -1,,-1. IF C(AC)=-1,,-1, THIS TEST PASSES
B45100: HLRE [-1] ;*HLRE SHOULD PLACE -1,,-1 INTO THE AC
CAME [-1] ;PASS IF C(AC)=-1,,-1
STOP
;**********
;THIS TEST VERIFIES THAT HLREM PLACES THE LEFT HALF OF C(AC)
;INTO THE RIGHT HALF OF E
;AND PLACES BIT 0 OF C(AC) INTO ALL BITS OF THE LEFT HALF OF E.
;IN THIS CASE, C(AC)=1,,0 AND C(E)=0. HENCE, THE RESULT IN E SHOULD BE -1,,-1.
;E IS CHECKED FOR -1,,-1. IF C(E)=-1,,-1, THIS TEST PASSES
B45200: SETZ ;PRELOAD E WITH 0
MOVE 1,[XWD -1,0] ;PRELOAD AC WITH -1,,0
HLREM 1, ;*HLREM SHOULD PLACE -1,,-1 INTO E
CAME [-1] ;PASS IF C(E)=-1,,-1
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 -1,,0 SW: SCE
;0 -1,,0 SW: ET0
;0 -1,,0 ET0: AR AD EN
;-1,,0 -1,,0 ET2: AR RT AR + EN
;0,,-1 -1,,0 ET2: AR0(1): AR LT AD EN
;**********
;THIS TEST VERIFIES THAT HRLM PLACES THE RIGHT HALF OF C(AC) INTO THE LEFT HALF OF E.
;THE RIGHT HALF OF E IS UNAFFECTED
;IN THIS CASE, C(AC)=0,,-1 AND C(E)=0. HENCE, THE RESULT IN E SHOULD BE -1,,0.
;E IS CHECKED FOR -1,,0. IF C(E)=-1,,0, THIS TEST PASSES.
B45400: SETZ ;PRELOAD E WITH 0
MOVEI 1,-1 ;PRELOAD AC WITH 0,,-1
HRLM 1, ;*HRLM SHOULD PLACE -1,,0 INTO E
CAME [XWD -1,0] ;PASS IF C(E)=-1,,0
STOP
;***** FAILURE ANALYSIS *****
;C(AC0) C(AC1) FAILING SIGNAL
;0 0,,-1 SW: FCE PSE
;0,,-1 0,,-1 SW: ET0
;-1,,-1 0,,-1 ET0: AD RT BR + EN
;-1,,B45400 0,,-1 ET0: BR AR EN
;0 0,,-1 ET0: AR AD EN
;0 0,,-1 ET2: AR LT AR RT EN
;**********
SUBTTL SUPPLEMENTARY ADDER TESTS - FLT 1 + 0
;**********
SN=45500
XX=0
B45500: REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A ZERO ADDED TO A FLOATING ONE
;IS THE FLOATING ONE.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=XX+XX
IFE XX,<XX=1>
HRRZI XX ;PRELOAD AC WITH FLOATING ONE
ADD [0] ;ADD ZERO TO A FLOATING ONE
CAME [XX] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
PAGE
XX=0
REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A ZERO ADDED TO A FLOATING ONE
;IS THE FLOATING ONE.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=XX+XX
IFE XX,<XX=1>
HRLZI XX ;PRELOAD AC WITH FLOATING ONE
ADD [0] ;ADD ZERO TO A FLOATING ONE
CAME [XX,,0] ;CHECK ADDER UPON FALIRE
STOP
;**********
>
SUBTTL SUPPLEMENTARY ADDER TESTS - O + FLT 0
;**********
SN=45600
B45600: REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ZERO ADDED TO A ZERO
;IS THE FLOATING ZERO.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ZERO THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=<XX+XX+1>&777777
IFE <XX-1>,<XX=777776>
SETZ ;PRELOAD AC WITH 0
ADD [-1,,XX] ;ADD A FLOATING ZERO TO ZERO
CAME [-1,,XX] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
PAGE
XX=0
REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ZERO ADDED TO A ZERO
;IS THE FLOATING ZERO.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=<XX+XX+1>&777777
IFE <XX-1>,<XX=777776>
SETZ ;PRELOAD AC WITH 0
ADD [XX,,-1] ;ADD A FLOATING ZERO TO ZERO
CAME [XX,,-1] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
SUBTTL SUPPLEMENTARY ADDER TESTS - FLT 1 + FLT 1
;**********
SN=45700
XX=0
B45700: REPEAT ^D17,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ONE
;ADDED TO A FLOATING ONE IS A FLOATING ONE
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ONE.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=XX+XX
IFE XX,<XX=1>
HRRZI XX ;PRELOAD AC WITH A FLOATING ONE
ADD [XX] ;ADD A FLOATING ONE TO ITSELF
CAME [XX+XX] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
PAGE
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ONE
;ADDED TO A FLOATING ONE IS A FLOATING ONE
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ONE.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=XX+XX
HRRZI XX ;PRELOAD AC WITH A FLOATING ONE
ADD [XX] ;ADD A FLOATING ONE TO ITSELF
CAME [1,,0] ;CHECK ADDRESS UPON FAILURE
STOP
;**********
XX=0
REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ONE
;ADDED TO A FLOATING ONE IS A FLOATING ONE
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ONE.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ONE THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=XX+XX
IFE XX,<XX=1>
HRLZI XX ;PRELOAD AC WITH A FLOATING ONE
ADD [XX,,0] ;ADD A FLOATING ONE TO ITSELF
CAME [XX+XX,,0] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
SUBTTL SUPPLEMENTARY ADDER TESTS - FLT 0 + 0FLT
;**********
SN=46000
XX=0
B46000: REPEAT ^D17,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ZERO
;ADDED TO A FLOATING ZERO IS A FLOATING ZERO
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ZERO.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ZERO THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=<XX+XX+1>&777777
IFE <XX-1>,<XX=777776>
HRROI XX ;PRELOAD AC WITH A FLOATING ZERO
ADD [-1,,XX] ;ADD A FLOATING ZERO TO ITSELF
CAME [-1,,<XX+XX>&777777] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
PAGE
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ZERO
;ADDED TO A FLOATING ZERO IS A FLOATING ZERO
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ZERO.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ZERO THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=<XX+XX+1>&777777
HRROI XX ;PRELOAD AC WITH A FLOATING ZERO
ADD [-1,,XX] ;ADD A FLOATING ZERO TO ITSELF
CAME [-2,,-2] ;CHECK ADDER UPON FAILURE
STOP
;**********
XX=0
REPEAT ^D18,<
;THIS TEST VERIFIES THAT THE RESULT OF A FLOATING ZERO
;ADDED TO A FLOATING ZERO IS A FLOATING ZERO
;PLACED ONE BIT POSITION LEFT OF THE ORIGINAL FLOATING ZERO.
;THIS TEST IS REPEATED 36 TIMES TO FLOAT A ZERO THRU ALL 36 BITS OF THE ADDER.
;THIS TEST IS DESIGNED TO TEST THE ADDER AND RELATED DATA PATHS ONLY.
SN=SN+1
XX=<XX+XX+1>&777777
IFE <XX-1>,<XX=777776>
HRLOI XX ;PRELOAD AC WITH A FLOATING ZERO
ADD [XX,,-1] ;ADD A FLOATING ZERO TO ITSELF
CAME [XX+XX+1,,-2] ;CHECK ADDER UPON FAILURE
STOP
;**********
>
;JRST BEGEND